The pointer value synchronized with other clock domain may become entirely different than intended. This metastable state can be resolved to any four-bit count value prediction of which is almost impossible. If the synchronization clock edge becomes active in between the transition of binary bits, say, 0111 to 1000, then metastability can occur with any of the four bits or with all the bits. Then changing bits (nothing but pointers) has to be synchronized with the other clock domains to generate empty and full condition. In worst case all 4 bits can change simultaneously like 0111 to 1000. For example bits changing from 0001 to 0010 are 2. Number of bits changing from one count to another count can be more than one. Hence to address these 16=2 4 locations we need 4 bit counter.( actually we need to design 5 bit counter….why…? we will see later !) binary code patterns are not unidistance. In our case we have total 16 memory locations in the FIFO. This counter works very well in addressing FIFO. Synchronization advantages and pitfalls between the read and write clock domain is the decisive factor in choosing right counter design as pointers.Īsynchronous FIFO Pointers Using Binary Countersīinary counter is natural counter and hence easy to design and implement. Each of these methods has merits and demerits. Two types of counters are used as FIFO pointers- binary counters and Grey counters.
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